In this paper, energy-efficient design for a 4:2 compressor is examined which utilizes 28 transistors. This design further enhances the XOR-MUX architecture for the 4:2 compressor and lowers the power consumption of the compressor. The methodology used for designing this architecture is CMOS modelling, in which each module of the architecture is designed using the least number of CMOS transistors. The proposed design of the compressor, when implemented on 45nm technology using the Microwind tool, provided a maximum output delay of 650ps and lowered the number of transistors utilized by 28% to 38%. This low power design will help the design of low energy and fast multipliers.

Numerically Controlled Oscillator (NCO) is the fundamental block for digital waveform generation currently being widely used in aerospace, mobile communication, satellite communication, navigation systems and radars. The design and implementation methodology of NCO is very crucial to meet the targeted specification of precise frequency control, phase control etc. along with additional constraints of low power, small area and lesser implementation/design time. This paper addresses design methodology of NCO meeting all these constraints for two important applications, Direct Digital Frequency Synthesizer (DDFS) and Digital up Converter (DUC)/ Digital down Converter (DDC).

This High-performance Comparator circuits are required and important modules for the design of integrated circuit data converter architectures that will be used in a variety of wireless portable electronic systems, including Smart phones and tablets. Using two alternative designs, the Double-Tail Comparator work reported in this study investigates specifications such as offset voltage (mv), power dissipation (W), voltage gain (dB), kick back noise reduction, propagation latency (ps), and speed-power product, among others (fJ). Analysis and Design New Double-Tail Comparator for Offset voltage optimization. A complete study and simulation of two comparator circuits is presented in this paper. The work is performed using the 0.13-micron CMOS process technology. For the comparator circuit, an integrated circuit designer can completely balance trade offs such as power consumption reduction, circuit speed optimization, and offset voltage minimization by using a hybrid design approach.

As we know by day to day increase in fuel like gasoline, diesel, petrol with day by day increasing the demand of vehicles we have to choose an alternative option for fulfil the demand of people. From about 100 varieties of oil seeds only , 10-12 varieties have been tapped so far . the main non -edible oil is Karanja, neem, mahua, olive etc. when we use non edible oil like mahua, neem, jatropha, olive etc by mixing with diesel an experimental results will found. when we mixed jatropha, mahua, neem as 20% with 80% diesel and 40% and 60% diesel. An experimental results will found with help of RK software. The emission like Cox, Sox , NOx is also less in these type of biodiesel fuel .If such type of process will be scaled at commercial level then a suitable business will be formed and beneficial income for farmers.